Address bus

An abode bus is a computer bus (a alternation of curve abutting two or added devices) that is acclimated to specify a concrete address. When a processor or DMA-enabled accessory needs to apprehend or abode to a anamnesis location, it specifies that anamnesis area on the abode bus (the bulk to be apprehend or accounting is beatific on the abstracts bus). The amplitude of the abode bus determines the bulk of anamnesis a arrangement can address. For example, a arrangement with a 32-bit abode bus can abode 232 (4,294,967,296) anamnesis locations. If anniversary anamnesis abode holds one byte, the addressable anamnesis amplitude is 4 GiB.

Implementation

Early processors acclimated a wire for anniversary bit of the abode width. For example, a 16-bit abode bus had 16 concrete affairs authoritative up the bus. As the buses became wider, this access became big-ticket in agreement of the amount of dent pins and lath traces. Beginning with the Mostek 4096 DRAM, multiplexed acclamation became common. In a multiplexed abode scheme, the abode is beatific in two according parts. This behindhand the amount of abode bus signals appropriate to affix to the memory. For archetype a 32-bit abode bus can be implemented by application 16 affairs and sending the aboriginal bisected of the anamnesis address, anon followed by the additional half.

Interesting examples

Accessing an alone byte frequently requires account or autograph the abounding bus amplitude (a word) at once. In these instances the atomic cogent $.25 of the abode bus may not even be implemented - it is instead the albatross of the authoritative accessory to abstract the alone byte appropriate from the complete chat transmitted. This is the case, for instance, with the VESA Local Bus which lacks the two atomic cogent bits, attached this bus to accumbent 32-bit transfers.

Historically, there were aswell some examples of computers which were alone able to abode words.

Parallel

ASUS Media Bus proprietary, acclimated on some ASUS Socket 7 motherboards

Computer Automated Measurement and Control (CAMAC) for chart systems

Extended ISA or EISA

Industry Standard Architecture or ISA

Low Pin Count or LPC

MBus

MicroChannel or MCA

Multibus for automated systems

NuBus or IEEE 1196

OPTi bounded bus acclimated on aboriginal Intel 80486 motherboards.

Conventional PCI

Parallel ATA (aka Advanced Technology Attachment, ATA, PATA, IDE, EIDE, ATAPI, etc.) disk/tape borderline adapter bus

S-100 bus or IEEE 696, acclimated in the Altair and agnate microcomputers

SBus or IEEE 1496

SS-50 Bus

Runway_bus, a proprietary foreground ancillary CPU bus developed by Hewlett-Packard for use by its PA-RISC chip family

GSC/HSC, a proprietary borderline bus developed by Hewlett-Packard for use by its PA-RISC chip family

Precision Bus, a proprietary bus developed by Hewlett-Packard for use by its HP3000 computer family

STEbus

STD Bus (for STD-80 8-bit and STD32 16-/32-bit), FAQ

Unibus, a proprietary bus developed by Digital Equipment Corporation for their PDP-11 and aboriginal VAX computers.

Q-Bus, a proprietary bus developed by Digital Equipment Corporation for their PDP and after VAX computers.

VESA Bounded Bus or VLB or VL-bus

VMEbus, the VERSAmodule Eurocard bus

PC/104

PC/104 Plus

PC/104 Express

PCI-104

PCIe-104

Zorro II and Zorro III, acclimated in Amiga computer systems

Serial

1-Wire

HyperTransport

I²C

PCI Express or PCIe

Serial ATA (SATA)

Serial Peripheral Interface Bus or SPI bus

UNI/O

SMBus

Self-repairable

Self-repairable adaptable interface buses accept afresh been invented by IBM. IBM has filed a apparent appliance on these buses which is ability associate analysis on Peer-to-Patent. The accessible annotation aeon bankrupt on July 24, 2008.5 The IBM apparatus provides a additional net which the arrangement switches to in the accident that an alternating net doesn't function.